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A million core RISC CPU

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At the recent HiPEAC conference in Stockholm, Andreas Olofsson presented a path to the world’s first million core RISC microprocessor. Slides (PDF) —- Andreas Olofsson, “How to build a million core processor”, MULTIPROG: 2017 International Workshop on Programmability and Architectures for Heterogeneous Multicores  

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Parallella Competition Rules (Rev 0.0)

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Parallella Programming Challenge Rev 0.0 Goal To create a fun competition where a new generation of programmers can be challenged and gain experience in parallel algorithms and parallel programming. Hardware Platform All teams will use identical parallel hardware platform consisting of FOUR Parallella (16+2)-core boards connected together through a Gigabit Ethernet switch. Hardware modifications are allowed but teams are not…

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