For those of you looking to cite the original work on Parallella and Epiphany, please use the following:
- A. Olofsson, R. Trogan, and O. Raikhman, “A 1024-core 70 GFLOP/W Floating Point Manycore Microprocessor“, 15th Annual Workshop on High Performance Embedded Computing, Sept 2011
- A. Olofsson, T. Nordström and Z. Ul-Abdin, “Kickstarting high-performance energy-efficient manycore architectures with Epiphany” 2014 48th Asilomar Conference on Signals, Systems and Computers, Pacific Grove, CA, 2014, pp. 1719-1726.
2016
- [101] Tatsunori Osone ; Masaru Yoshikawa ; Yoichi R. Fujii, “Quantum fluctuations in biological functions: Computational analysis of diseases with the human microRNA memory package“, SAI Computing Conference (SAI), 2016
- [100] Máté Karácsony, Koen Claessen, “Using fusion to enable late design decisions for pipelined computations“, Proceedings of the 5th International Workshop on Functional High-Performance Computing
- [99] Wojciech Turek , Jan Stypka , Daniel Krzywicki , Piotr Anielski , Kamil Pietak , Aleksander Byrski, Marek Kisiel-Dorohinicki “Highly scalable Erlang framework for agent-based metaheuristic computing“, Journal of Computational Science
- [98] Rodrigues, Sandro, “Operating infrastructure for an FPGA and ARM“, Mater’s Thesis, Universidade de Aveiro
- [97] Vaas, Steffen; Reichenbach, Marc; Hofmann, Johannes; Stadelmayer, Thomas; Fey, Dietmar, “Embedded Parallel Computing Accelerators for Smart Control Units of Frequency Converters“, Conference: ARCS 2016 – 29th International Conference on Architecture of Computing Systems
- [96] Jan-Willem Buurlage, Tom Bannink, Abe Wits, “Bulk-synchronous pseudo-streaming algorithms for many-core accelerators“, HLPP 2016: International Symposia on High-Level Parallel Programming and Applications
- [95] Nachiket Kapre, Siddhartha, “Communication Optimization for the 16-Core Epiphany Floating-Point Processor Array“, 2016 IEEE 24th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM)
- [94] Gopalakrishna Hegde Siddhartha, Nachiappan Ramasamy, Vamsi Buddha, Nachiket Kapre, “Evaluating Embedded FPGA Accelerators for Deep Learning Applications“, IEEE 24th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM)
- [93] Miguel Tasende, “Generation of the Single Precision BLAS library for the Parallella platform, with Epiphany co-processor acceleration, using the BLIS framework“, Conference manuscript for IEEE DataCom 2016
- [92] David Richie, James Ross, “OpenCL + OpenSHMEM Hybrid Programming Model for the Adapteva Epiphany Architecture“, OpenSHMEM 2016, Third workshop on OpenSHMEM and Related Technologies
- [91] James Ross,David Richie, “An OpenSHMEM Implementation for the Adapteva Epiphany Coprocessor“, OpenSHMEM 2016, Third workshop on OpenSHMEM and Related Technologies
- [90] Olesen, Daniel Madelung; Jakobsen, Jakob; von Benzon, Hans-Henrik; Knudsen, Per, “GNSS Software Receiver for UAVs“, European Journal of Navigation
- [89] Gopalakrishna Hegde, Nachiappan Ramasamy, Siddhartha, Nachiket Kapre, “CaffePresso: An Optimized Library for Deep Learning on Embedded Accelerator-based platforms“, 2016 International Conference on Compilers, Architectures, and Synthesis for Embedded Systems
- [88] Niranjan Suri, Mauro Tortonesi, James Michaelis, Peter Budulas, Giacomo Benincasa, Stephen Russell, Cesare Stefanelli, Robert Winkler, “Analyzing the applicability of Internet of Things to the battlefield environment“, 2016 International Conference on Military Communications and Information Systems (ICMCIS)
- [87] Samuel Sheffield, “Constructing and Performance Benchmarking of a Parallella Cluster“, 29th Annual Southeastern Conference, Consortium for Computing Sciences in Colleges
- [86] Spiros N. Agathos, Vassilios V. Dimakopoulos, “Compiler-Assisted OpenMP Runtime Organization for Embedded Multicores“, TR-2016-1, University of Ioannina
- [85] Vaas, Steffen; Reichenbach, Marc; Hofmann, Johannes; Stadelmayer, Thomas; Fey, Dietmar, “Embedded Parallel Computing Accelerators for Smart Control Units of Frequency Converters“, ARCS 2016 – 29th International Conference on Architecture of Computing Systems
- [84] Spiros Agathos, “Efficient OpenMP Runtime Support for General-Purpose and Embedded Multi-Core Platforms“, PhD Thesis, University of Ioannina
- [83] Jose Luis Gonzalez-Conde Perez, “Analysis of task scheduling for multi-core embedded systems“, Master’s Thesis, Royal Institute of Technology (KTH)
- [82] Peter Munk, Mohammad Shadi Alhakeem, Raphael Lisicki, Hendrik Röhm, Helge Parzyjegla, Hans-Ulrich Heiss, “A Software Fault-Tolerance Mechanism for Real-Time Applications on Many-Core Processors“, Workshop on Highly-Reliable Power-Efficient Embedded Designs, At Barcelona
- [81] Manel ABDELLATIF, “ACCÉLERATION DES TRAITEMENTS DE LA SÉCURITÉ MOBILE AVEC LE CALCUL PARALLÈLE“, Master’s Thesis, ÉCOLE DE TECHNOLOGIE SUPÉRIEURE UNIVERSITÉ DU QUÉBEC
- [80] Hesham Moustafa Khaled Almatary, “Operating System Kernels on Multi-core Architectures“, Master’s Thesis, University of York
- [79] Daniel R. Mendat, Sang Chin, Steve Furber, Andreas G. Andreou, “Neuromorphic sampling on the SpiNNaker and Parallella chip multiprocessors” 2016 IEEE 7th Latin American Symposium on Circuits & Systems (LASCAS)
- [78] Simon J. Hollis and Steve Kerrison, “Swallow: Building an Energy-Transparent Many-Core Embedded Real-Time System“, To appear in DATE 2016
- [77] R. Sandoval-Arechig, R. Parra-Mochel, J. L. Vazquez-Avila, J. Flores-Troncoso, S. Ibarra-Delgado “Software Defined Networks-on-Chip for Multi/Many-Core Systems: A Performance Evaluation“, Proceedings of the 2016 Symposium on Architectures for Networking and Communications Systems
- [76] Rokas JUREVIČIUS, Virginijus MARCINKEVIČIUS, “Energy Efficient Platform for Sobel Filter in Energy and Size Constrained Systems“, Baltic J. Modern Computing, Vol. 4 (2016), No. 1, 79-88
- [75] Siddhartha, Nachiket Kapre, “Optimizations for the 16-core Epiphany Floating-Point Processor Array“, The 24th IEEE International Symposium onField-Programmable Custom Computing Machines
- [74] David Richie, James A. Ross, “Advances in Run-Time Performance and Interoperability for the Adapteva Epiphany Coprocessor“, ICCS Alchemy Workshop, 2016
- [73] James A. Ross, David A. Richie, “Implementing OpenSHMEM for the Adapteva Epiphany RISC Array Processor“, ICCS Alchemy Workshop, 2016
- [72] Michael Bromberger, incent Heuvelinem Wolfgang Karl, “Reducing Energy Consumption of Data Transfers Using Runtime Data Type Conversion“, ARchitecture of Computing Systems — ARCS 2016
- [71] Julien Vachelard, Thaise Gambarra-Soares, Gabriela Augustini, Pablo Riul, Vinicius Maracaja-Coutinho “A Guide to Scientific Crowdfunding“, PLoS Biol 14(2): e1002373. doi:10.1371/journal.pbio.1002373
- [70] James Ross, David Richie, Song Park, Dale Shires, “Parallel programming model for the Epiphany many-core coprocessor using threaded MPI“, Microprocessors and Microsystems
- [69] Taeyoung Kim, Jintaek Kang, Sungchan Kim, Soonhoi Ha, “SoPHy+: Programming model and software platform for hybrid resource management of many-core accelerators“, Microprocessors and Microsystems
- [68] Joel Adams, Jacob Caswell, Suzanne J. Matthews, Charles Peck, Elizabeth Shoop, David Toth, James Wolfer “The Micro-Cluster Showcase: 7 Inexpensive Beowulf Clusters for Teaching PDC” Proceedings of the 47th ACM Technical Symposium on Computing Science Education
- [67] Jan-Willem Buurlage, “Self-Improving Sparse Matrix Partitioning and Bulk-Synchronous Pseudo-Streaming“, Master’s Thesis, Scientific Computing Group Mathematical Institute Utrecht University
- [66] Alexandros Papadogiannakis, “Restructuring the OMPi Compiler for the Accelerator Era“, Master’s Thesis, No. PPG-22M9, Dept. of Computer Science and Engineering, Univ. of Ioannina, Feb. 2016
- [65] Noémien Kocher, Parallella computing: Another distributed system story, Technical Report, University of Applied Sciences of Western Switzerland , 2016
- [64] Peter Brauer, Martin Lundqvist, Aare Mällo, “Improving Latency in a Signal Processing System on the Epiphany Architecture“, 24th Euromicro International Conference on Parallel, Distributed and Network-Based Processing. Heraklion Crete, Greece, 17th-19th February 2016
- [63] Matthews, SJ. “Teaching with Parallella: A First Look in an Undergraduate Parallel Computing Course“. Journal of Computing Sciences in Colleges, 31(3), pp. 18-27. 2016. Note: Best Paper Award, CCSC Eastern
2015
- [62] R. Ramrez-Rubio, E. Solorzano-Alor, M. Aldape-Perez and C. Yanez-Marquez, “Feature Selection on Associative Models using Single Board Computer Paradigm“, Research In Computing Science, Technological Trends in Computing
- [61] Olesen, Daniel Madelung; Jakobsen, Jakob; Knudsen, Per. “Software-Defined GPS Receiver Implemented on the Parallella-16 Board“, Proceedings of the 28th International Technical Meeting of The Satellite Division of the Institute of Navigation
- [60] James Ross, David Richie, Song Park, “Implementing Image Processing Algorithms for the Epiphany Many-Core Coprocessor with Threaded MPI“, IEEE High Performance Extreme Computing Conference, 2015
- [59] TAS-E, EXFO, KTH, RTE, Tecnalia, “D5.8 Final hardware platform implementations Version 1.0, PAPP EU Project“
- [58] Peter Brauer, Martin Lundqvist and Aare Mällo, “Improving latency in a signal processing system on the Epiphany architecture“, MCC 2015: Eighth Swedish Workshop on Multi-Core Computing
- [57] Steven Kerrison, “Energy modelling of multi-threaded, multi-core software for embedded systems“, PhD Thesis, University of Bristol
- [56] Farahaninia, Farzad, “Acceleration of Parallel Applications by Moving Code Instead of Data“, Halmstad Hogskola Master’s Thesis
- [55] S Mount, R. Newman, “Energy-Efficient Brute Force Password Cracking“, Intelligence and Security Informatics Conference (EISIC), 2015 European
- [54] R Jurevičius, V. Marcinkevičius, “Energy efficient platform for sobel filter implementation in energy and size constrained systems“, Information, Electronic and Electrical Engineering (AIEEE), 2015 IEEE 3rd Workshop on Advances in
- [53] Liu Ke, “A Simulation Based Approach to Estimate Energy Consumption for Embedded Processors“, Masters Thesis, Halmstad Hogskola
- [52] Y. S. Gener, A. Yildiz, S. Goren, “Low-cost and low-power video filtering with parallel many cores“, 2015 9th International Conference on Electrical and Electronics Engineering (ELECO)
- [51] Sebastian Raase, “A Dataflow Communications Library for Adapteva’s Epiphany“, Halmstad Hogskola Technical Report
- [50] Erik Alveflo, “Adaptive core assignment for Adapteva Epiphany“, Master of Science Thesis in Embedded Electronic System Design, Chalmers University
- [49] Rokas Jureviˇcius, “Vision aided localization and navigation of an autonomous helicopter“, Technical Report MII-DS-07T-15-9, Vilnius University
- [48] T Vocke, “An evaluation of the Adapteva Epiphany Many-core architecture“, Technical Report, Master’s Thesis, University of Twente/ Thales
-
[47] Johann Schumann, Indranil Roychoudhury, and Chetan Kulkarni, “Diagnostic Reasoning using Prognostic Information for Unmanned Aerial Systems“, Health Management Society’s 2015 Prognostics and Health Management Conference (PHM 2015), Best Paper Mention
-
Towards Real-time, On-board, Hardware-supported Sensor and Software Health Management for Unmanned Aerial Systems“, International Journal of Prognostics and Health Management (2015)“
- [45] Alexandros Papadogiannakis,Spiros N. Agathos, Vassilios V. Dimakopoulo, “OpenMP 4.0 Device Support in the OMPi Compiler“, OpenMP: Heterogenous Execution and Data Movements, Volume 9342 of the series Lecture Notes in Computer Science pp 202-216
- [44] Johann Schumann, Patrick Moosbrugger, and Kristin Y. Rozier. “R2U2: Monitoring and Diagnosis of Security Threats for Unmanned Aerial Systems.” In Proceedings of the 15th International Conference on Runtime Verification (RV15), Springer-Verlag, Vienna, Austria, September 22–25, 2015.
- [43] Kristin Y. Rozier, Johann Schumann,Corey Ippolito. “Intelligent Hardware-Enabled Sensor and Software Safety and Health Management for Autonomous UAS“, NASA Technical Report
- [42] Munk, Peter, Saballus, Bjoern, Richling, Janan, Heiss, Hans-Ulrich, “Position Paper: Real-Time Task Migration on Many-Core Processors“, Architecture of Computing Systems. Proceedings, ARCS 2015, March 2015
- [41] Del Amo Jiménez, M., “Runtime para task offloading en la arquitectura Adapteva Parallella“, Technical Report, Universitat Potitecnica de Catalunya
- [40] Michael Kruger,”Building a Parallella board cluster“, Undergraduate Thesis, Rhodes University, South Africa
- [39] Alexander Kuhn, “Review of Novel Computing Architectures for Neural Applications“, Technical Seminar Report,Technische Universitüt München
- [38] Luley, Ryan, “MODELING & ANALYSIS OF MULTICORE ARCHITECTURES FOR EMBEDDED SIGINT APPLICATIONS“, US Airforce Research Laboratory Technical Report
- [37] Bartok, R,”A fuzzy rule interpolation base algorithm implementation on different platforms”, Carpathian Control Conference (ICCC), 2015 16th International
- [36] Floris Turkenburg, “Extending ManyMan with additional back-ends for big.LITTLE and Parallella“, Senior Thesis, University of Amsterdam
- [35] David Richie, James Ross, Song Park, Dale Shires, “Parallel Programming Model for the Epiphany Many-Core Coprocessor Using Threaded MPI“, ISCA’15, Third ACM International Workshop on Manycore Embedded Systems
- [34] David Richie, James Ross, Song Park, Dale Shires, “Threaded MPI Programming Model for the Epiphany” , Journal of Computational Science, Volume 9, July 2015, Pages 94–100
- [33] Ola Jeppsson, Sally McKee, “Towards a scalable functional simulator for the Adapteva Epiphany architecture“, MULTIPROG-2015, HiPEAC
- [32] Zain Ul-Abdin , Mingkun Yang, “A Radar Signal Processing Case Study for Dataflow Programming of Manycores“, Journal of Signal Processing Systems, Nov 27. 2015
- [31] Zain Ul-Abdin , Mingkun YangZain Ul-Abdin, Bertil Svensson, Towards Teaching Embedded Parallel Computing: An Analytical Approach, 18th Workshop on Computer Architecture Education (WCAE) (ISCA2015) , Portland, OR, USA, June 13, 2015
- [30] Yilmaz Serhan Gener, Abdullah Yildiz, Assoc. Prof. Sezer Goren, “Low-Cost and Low-Power Video Filtering with Parallella“, Yeditepe University Technical Report
- [29] Spiros N. Agathos, Alexandros Papadogiannakis and Vassilios V. Dimakopoulos, “Targeting the Parallella with OpenMP“, Euro Par 2015
- [28] Brennand Pierce and Gordon Cheng, “Herbert: design and realization of a full-sized anthropomorphically correct humanoid robot“, Frontiers in Robotics and AI
- [27] Joel C. Adams, Jacob Caswell, Suzanne J. Matthews, Charles Peck, Elizabeth Shoop, David Toth , “Budget Beowulfs: A Showcase of Inexpensive Clusters for Teaching PDC“, Proceedings of the 46th ACM Technical Symposium on Computer Science Education
- [26] Sebastian Raase, Tomas Nordström, “On the Use of a Many-core Processor for Computational Fluid Dynamics Simulations“, International Conference On Computational Science, ICCS 2015
- [25] Jerry Lindström, Stefan Nannesson, “Implementing a streaming application on a processor array“, Lund University Master’s Project
- [24] Nahro Nadir, Omar Jamal, “Communication mechanism among instances of many-core real time system“, Malardalen University Master’s Project
- [23] Magnus Lang, Kostis Sagonas, “Running Erlang on the Parallella“, Erlang User Conference 2015
-
[22] Essayas Gebrewahid, “Compiling Concurrent Programs for Manycores”, PhD Thesis, Halmstad University
2014
- [21] Andreas Olofsson, Tomas Nordström, and Zain Ul-Abdin, “Kickstarting High-performance Energy-efficient Manycore Architectures with Epiphany“, Asilomar Conference on signals, systems, and computers , Nov 2014
- [20] А.А. Сухинов, Г.Б. Остроброд, “ЭФФЕКТИВНАЯ ДЕТЕКЦИЯ ЛИЦ НА МНОГОЯДЕРНОМ ПРОЦЕССОРЕ EPIPHANY1“, (EFFICIENT FACE DETECTION ON EPIPHANY MULTICORE PROCESSOR), Bulletin of the South Ural State University Series “Computational Mathematics and Software Engineering” 2014, vol. 3, no. 3, pp. 5–19
- [19] Anish Varghese, Bob Edwards, Gaurav Mitra, Alistair P. Rendell, “Programming the Adapteva Epiphany 64-core NoC Coprocessor” 14 pages, submitted to IJHPCA Journal special edition,
- [18] Laust Brock and Sven Karlsson, “Library support for resource constrained accelerators“, 10th International Workshop on OpenMP, IWOMP 2014, Salvador, Brazil, September 28-30, 2014. Proceedings
- [17] Farshid Besharati, Mahdad Davari, Christian Danheimer Furedal, Björn Forsberg, Niklas Forsmark, Henrik Grandin, Jimmy Gunnarsson, Engla Ling, Marcus Lofvars, Sven Lundgren, Luis Mauricio, Erik Norgren, Magnus Norgren, Johan Risch, Christos Sakalis, and Stefanos Kaxiras, “The EVI Distributed Shared Memory System”, Uppsala Technical Report 2015-006
- [16] Katja Malvoni, Solar Designer,Josip Knezovic “Efficient Bcrypt Cracking with Low-Cost Parallel Hardware“, Usenix 2014
- [15] Savas, S., Gebrewahid, E., Ul-Abdin, Z., Nordstrom, T, Mingkun Y, “An evaluation of code generation of dataflow languages on manycore architectures , Embedded and Real-Time Computing Systems and Applications (RTCSA), 2014 IEEE 20th International Conference on
- [14] Zain Ul-Abdi, Mingkun Yang, “Dataflow Programming of Real-time Radar Signal Processing on Manycores“, GlobalSIP 2014: Data Flow Algorithms and Architecture for Signal Processing Systems
- [13] Essayas Gebrewahid , Mingkun Yang, Gustav Cedersjo , Zain-Ul-Abdin, Veronica Gaspes, Jorn Janneck , and Bertil Svensson, “Realizing Efficient Execution of Dataflow Actors on Manycores“, Conference: 12th IEEE International Conference on Embedded and Ubiquitous Computing (EUC), 2014
- [12] Mingkun, Yang, “CAL code generator for Epiphany architecture“, Master’s Thesis, Halmstad Hogskola
- [11] Michał Bejda, “Efficient code placement management for Epiphany architecture chips“, Master’s Thesis, Jagiellonian University
2013
- [10] Zain-ul-Abdin, Anders Ahlander, Bertil Svensson, Real-time radar signal processing on Massively Parallel Processor Arrays, Signals, Systems and Computers, 2013 Asilomar Conference on
- [9] Zain-ul-Abdin, Anders Ahlander, Bertil Svensson, Energy-Efficient Synthetic-Aperture Radar Processing on a Manycore Architecture, 2013 42nd International Conference on Parallel Processing (ICPP)
- [8] Amirhossein Taher Kouhestani, Power-aware Scheduler for Many-core, Master’s Thesis, KTH
- [7] Christoffer Lind, Jonas Green, Thomas Ingvarsson, “Movement sensor using image correlation on a multicore platform“, Master’s Thesis, Halmstad Hogskola
- [6] Xi Zhou, Yaoyao Luo, “Implementation of Hierarchical Temporal Memory on a Many-core Architecture“, Master’s Thesis, Halmstad Hogskola
- [5] James Pallister, Simon J. Hollis, and Jeremy Bennett, “Identifying Compiler Options to Minimize Energy Consumption for Embedded Platforms“, The Computer Journal
- [4] James Pallister, Simon J. Hollis, and Jeremy Bennett, “BEEBS: Open Benchmarks for Energy Measurements on Embedded Platforms“, Open Publication
- [3] Andreas Olofsson, Roman Trogan, Oleg Raikhman “A Sub 2 Watt 64-core 100 GFLOPS Accelerator Programmable in C/C++ or openCL“, High Performance Embedded Computing Conference, Sept 2013
2011
- [2] Andreas Olofsson, Roman Trogan, Oleg Raikhman “A 1024-core 70 GFLOP/W Floating Point Manycore Microprocessor“, High Performance Embedded Computing Conference, Sept 2011
2010
- [1] Andreas Olofsson, Roman Trogan, Oleg Raikhman, “A 25 GFLOPS/Watt Software Programmable Floating Point Accelerator“, High Performance Embedded Computing Conference 2010
Del Amo Jiménez, M., “Runtime para task offloading en la arquitectura Adapteva Parallella“, Technical Report, Universitat Potitecnica de Catalunya
He states 174us for 512×512 matrix multiplication.
I think there might be a mistake (if I am not wrong that would be about 1500 GFLOPS). I think the time may be 174ms…
[…] PUBLICATIONS […]
[…] Scientific Papers […]
Hello,
In “A 1024-core 70 GFLOP/W Floating Point Manycore Microprocessor”, you wrote “simpler NoC router design and smaller FIFOs”. Can you given the size of the FIFOs? Is a credit-base flow control mechanism is used? Thanks
Hello,
Why is it so difficult to find the file that drives the Parallella16? ?
I can not find it anywhere!
You instructions tell to “Just” download this image and the Parallella16_i7020WGPIO_131210.zip
Being the brains, you should have at least thought to make it easier for us who are new at this, to find things easier.
I have wasted hours attempting to find this zip file. You should have a button on the site that has the label “Parallella16_i7020WGPIO_131210.zip download”
I can not find it anywhere.
And then I might also have the same question as below in this window; How do I program the Parallella? I have not had one display or keyboard response to this board? Did I get a bad board? Is it even working?
Hello again,
Things about the desktop board, or any board should be explained clearer. I have been building computers since the 90’s, but things keep changing and new definitions are being keyed. For instance: firmware. Is firmware the same as software? Is firmware just a new name for the software that is loaded to the ROM? What is the difference between firmware and software?. But I still can not fined the “Parallella16_i7020WGPIO_131210.zip” ! !
I put the “Parallella16_i7020WGPIO_131210.zip” title into your search box and it did not recognize this, giving the response “Not Found”.
Maybe I typed it wrong, because there is no distinction between and “I” and an “l”. (That is a capital “ie” “i”, and a small case “el, “L” “.) These things should be noted in the description. All most of us are asking is, be more precise! !
Maybe you should consider doing something else, such as stamp collecting if you cannot even figure out how to use the wiki, or forum for those answers.
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