The Parallella Board Has Arrived!
DAY 1:
The first 10 Parallella boards arrived on Thursday 4/11 and we fired up the first boards around 1:30pm. Some very nervous moments followed…but no smoke was coming out of the board! We would like to say that everything worked perfectly out of the box..but that wasn’t quite the case. Fortunately we decided to do the initial bringup at the local factory (with some great soldering “artists” on hand) so we had most show-stopper issues and workarounds done within a few hours. Later that evening, we did uncover one more issue that we had to resolve ourselves in order to keep moving forward. (Lesson learned: I need to improve my soldering skills and make sure we have the right equipment on hand because those pads are very small! ) One very ugly soldering job later and we were up and running.
DAY 2:
Debugging continued. Roman configured the Zynq chip to use the UART port on the PEC_POWER connector as a terminal output and wrote a bare metal application that executed out of the Zynq’s on-chip memory. After a few hours, garbled messages were finally coming out of the UART port. At that point it didn’t take long to figure out what had changed compared to the previous Parallella prototype … Finally we could see these beautiful words appear on the terminal screen.
DAY 3:
More good news! Roman was able to communicate directly with the Epiphany chip and set the flag output on the Epiphany chip. It may sound trivial, but it’s actually a pretty big deal since almost everything on the Epiphany chip is memory mapped.
Moving forward:
We still have a LOT of work in front of us to test all the features on the Parallella board, but the first tests shown here are very encouraging! The next step is to work through the Linux boot process so that we can start testing the peripherals. After Linux boots properly, we will start performance testing the board using the software infrastructure built up for the Parallella prototype boards over the last few months.
The next few weeks are going to be a lot of fun!
Andreas
“The next few weeks are going to be a lot of fun!”
I can imagine that 😉
Congratulations!
This is great news, guys!
Congratulations!
nice!
This is amazing! Keep up the good work!
Did you decide to do 64 core boards after all even though the stretch goal was not met? If so, great news for me 🙂
awesome
Awesome! This is really exciting!
Congratulations!!! Enjoy the fun! Thanks again for “pressing ON!” 😉
Good to know. Would these boards further undergo some sort of quality tests for durability,thermal stress etc?
nice! … when can we expect the shipping?
We need that fun too 😉
Hi,
For hardware bringup, it is usually a good thing to start with the bootloader first instead of going with the full Linux kernel. We recently made a Barebox port for the Zynq (tested on zedboard), which might be a good start for you as well.
Good luck with the next steps!
Robert
model “16 cores” still not ready, and already i can’t wait for model “1024 cores” 🙁
great job, i can ‘t wait for my boards 🙂
Great job. I am in the queue for few.
so great 🙂
Cool cannot wait get my hands dirty
🙂
How easy/difficult is it to write program that runs the Epiphany chip? If it is harder to use than pthread or CUDA/OpenCL then the chip only adds additional cost to the board.
I’m wondering the same thing… I also signed up for that reward, and though I’ll be happy with two 16 core boards too and had pretty much assumed that’d be it, a 64 core one would be fantastic…
There is a fully open source OpenCL implementation that supports Epiphany, called COPRTHR, which also includes a simplified API called STDCL. If you take a look at the OpenCL forum you’ll see some examples, e.g. for calculating a Mandelbrot set. There is also example code in the epiphany-sdk repo on Adapteva’s GitHub.
Awesome stuff! Just a quick question: I’m doing a physics project and this is exactly what I need, any ideas when I can buy one of these?
i can understand how much is funny and encouraging your work is.
I would be over the moon, if just i can turn On/off a fully tested dev board’s LEDS.
i want to make some robot with this 😀
[…] eerste tien Parallela-borden arriveerden afgelopen week bij Adapteva. De Parallella bevat een Zynq-7020 Cortex A9-dualcore en Epiphany […]
This little thing is absolutely mind blowing. I just bought an ARM A9 based Odroid which has a quad-core Exynos 4412 (?) running at a max of 2 GHz for $90 and I thought that thing was fast! I’ll have to keep my eye on it 🙂
Hello, congrats for the project it was a great job. I would like to know how much will cost the finals units?
and the first pc this precious piece of hardware is communicating to is a windows pc 🙁 besides that, GREAT WORK, can’t wait to play! 😛
Andreas you’re about to deliver a new standard for speed in computing. I guess that the only thing is that the data transfer will be to use it up to its potential. Anyways it’s great to see that there are people who are actually working together for everybody to evolve. Thumbs up ! I’ll be supporting all of your efforts in any way I can.
Great work sir’!
I have been following many ARM SoCs based board’s development for quite some time and I am astonished by the sheer power Parallella will provide.
Having a plan at the back of my mind for a custom Map Reduce program to be run off 2x 64cores Parallella boards 😀
FCI.H:#define tcompMASK_TYPE 0x000F // Mask for cemprossion type#define tcompTYPE_NONE 0x0000 // No cemprossion#define tcompTYPE_MSZIP 0x0001 // MSZIP#define tcompTYPE_QUANTUM 0x0002 // Quantum#define tcompTYPE_LZX 0x0003 // LZX#define tcompBAD 0x000F // Unspecified cemprossion type