So I am eagerly awaiting a complementary Porcupine the Parallella team have generously donated, and thinking about what peripherals I will need to bring out in order to interface with my robotic camera project.
I have been doing a bit of work recently with OMAP processors, so familiar with being able to reroute peripherals to IO pins at runtime using pinmuxing. The way of doing this on the Zynq seems very restrictive, since it is configured in the FPGA bitstream itself. So I had the brilliant thought that I could implement my own multiplexer module to deal with all these various configurations. Then it would be possible to provide a multiplexer enabled bitstream (either in the official repo, or a supplementary bitstream) which would allow people to configure their daughterboards without needing to recompile the FPGA at all.
I have secondary motivation for this also, around runtime reconfiguration capability of the FPGA, but I'll keep this out of the main post and post it below.
For the first, this would be a post-boot configuration, so once the kernel is up, it remains configured based on what you specify in the device tree.
The answer to both problems is FPGA multiplexing.
This would enable use cases like:
* Connecting up a new peripheral, say a second SPI device, via your breakout-style daughterboard, without rebuilding the FPGA.
* Reclaiming a no longer used I2C bus and repurposing it for GPIO, again without needing to know how to build an FPGA.
I discovered last night that Frank Buss by a good few months. I thought it odd that Frank's suggestion (being such an important one) didn't get a single comment, so I am reviving the discussion here.
I gather nobody has been investigated this since?
If Fred, or the other FPGA experts are not already planning this, I would like to stress how important this is (yes, there are voltage translation issues as another barrier to the hobbyist - but hobbyists are generally good at dealing with those).
If nobody else is looking at it, at least register your interest. If enough people want it, I might set my project aside and look into whether I can't work out how to do it. I am not an FPGA expert, but I do like a challenge every now and again.