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Now onto software exceptions. Architecture reference 4.13.09.29 section 7.5 Status Flags - EXCAUSE describes this as a 3-bit field and refers to Appendix C for more info. The info is in appendix D and describes this as a 4-bit field (also in the description of the STATUS register).

Thanks for the new versions of the E16G301 data sheet and Arch Ref manual.

I'm having difficulty understanding the eLink protocol explanation on page 19 of revision 14.02.21 of E16G301.

Are there mistakes in the row of {datamode[1:0],write,read} values? They seem to have read and write reversed.

Should they say "0X10 1010 1110 XX01 XX11" ?

p18 The link in the green box is wrong, needs "ell" inserted towards the end.
p19 In the green box the consequences of not using an optimal sequence seem to have been censored.

Later edit:
For byte and half word writes are the data always in the lower numbered bytes (5 and 6) with bytes 7 and 8 always zero, or are they positioned in the appropriate spot within the whole word? If the latter, that would have to depend on destination address.

Thanks,

Tim

Tim,
Thanks for the feedback! These have been fixed in the new datasheets.
We do data alignment on write "to the right". The byte is sitting on the 64bit bus as is in the right spot. This detail is exposed on the eLink and must be taken care of inside the FPGA logic (an example of this can be found in the AXI master interface)

Andreas

I'm not entirely sure about the data sheet fix for the eLink. You seem to have changed the caption from "write, read" to "read write". I thought the original caption was correct but the bit patterns are wrong, but I'm not very good with HDL to confirm that. The byte zero line description still describes the order as "write, read".

Tim

Epiphany SDK Reference REV 5.13.09.10

Description end abuptly

13.6.6 e_barrier_init()
Synopsis
#include “e-lib.h”
void e_barrier_init(volatile e_barrier_t bar_array[], e_barrier_t *tgt_bar_array[]);
Description
Initialize a workgroup barrier. The bar_array and tgt_bar_array parameters are defined as arrays of size equal to the number of cores in the workgroup. The barrier is mutual to all cores in the workgroup, so care must be taken w

it's a less important error i suppose but in https://github.com/parallella/parallell ... recipe.txt on line 98 is it supposed to be evince ? cause evincea made me thinking for 5 min

Minor one in the SD Creation online document http://www.parallella.org/create-sdcard/

Section: Linux SD Installation Instructions
Item: 5 Copy the Parallella Linux kernel and FPGA files to the SD card

The last linux command should be sync and not syn

"
$ tar -zxvf <kernel-name>.tgz -C <sd-device-path>/BOOT
$ cp <parallella-bit-release>.bin <sd-device-path>/BOOT/parallella.bit.bin
$ syn
"

Regards

Gary

Epiphany Architecture Reference, Rev. 14.03.11

Page 108 (MBKPT): It allows all cores to stop at approximately the same time, simplifying multicore code debugging easier.

Page 157 (Appendix E): Two typos in "Fixed lots of typos (an probably added some more..)" If that's on purpose, I would recommend shuffling some letters in probably instead.