Re: Documentation Errors
Posted: Tue Jul 02, 2013 9:58 pmTo add to @Hoernchen's answer - the IVT is indeed (physically) a part of the 1st SRAM bank. The way of setting the target addresses for the interrupt handlers is to write to the IVT entries, which are RAM. The IVT actually contains 10 entries (taking 40 bytes). The 64-bytes number in the table is just a round-up.
The only interrupt vector that really matters is the first one, at address 0x0000, since it is associated with the SYNC event, used to start the program (and even this can be (ab)used in some careful way). If you are extremely tight in space, you can theoretically use the other entries, provided that you don't use any other interrupts in your system.
A word is saved in the memory in 4 consecutive bytes, where the 1st byte's address is 32-bit aligned.
The only interrupt vector that really matters is the first one, at address 0x0000, since it is associated with the SYNC event, used to start the program (and even this can be (ab)used in some careful way). If you are extremely tight in space, you can theoretically use the other entries, provided that you don't use any other interrupts in your system.
A word is saved in the memory in 4 consecutive bytes, where the 1st byte's address is 32-bit aligned.