Is there a way to build headless project?
Posted: Sat Jul 22, 2017 7:41 amIt works with Vivado 2015.4 and SDK 2015.4, see http://parallella.org/forums/viewtopic. ... 068#p19457 (no worries, you can install both versions on the same computer, the bloatware needs only 35 GB on your harddisk). See later in this post how I ported the accelerator project to Vivado 2017.2, with a link to my github fork, which has also a modification to access the GPIOs from the Verilog code, which was not part of the original accelerator code.
Shouldn't be too difficult to port the Parallella headless project as well and might be useful. The Vivado GUI is still the same and cumbersome to use, but it looks a bit nicer and the IPs are updated and maybe bugs are fixed.