FMC LPC Connector

[cospan]

I can appreciate that it's late in the design cycle to make any request for connectors but has the Parallella team considered using a standard connector like FMC.

I think that the current connector selection is great for high throughput but it offers no path for quick prototyping that simple .1 inch headers have. I understand that .1 inch headers leave something to be desired in the realm of signal integrity but that's where FMC boards come in.



What's great about this standard is that you leverage the pre-existing daughter cards that are out there. If people want to buy a board with .1 inch headers and play around with their board then they are free to do so. Future Parallela boards can use the same connector as well as taking advantage of all the gigabit transceivers that you can get when your team may switch to a higher end Zynq chip.

In my opinion you will loose some of your market due to the pain associated with building a daughter card with a non-standard connector. I hope you can hand solder that connector because if you can't that means that every daughter board is a significant investment.

I'm not trying to troll here but I think TI has learned their lesson with the BeagleBoard. It came with two row .1 inch header with a 1.8V level which was a pain in and of itself because the first thing you had to do was level convert that signal and the highest throughput bidirectional communication was a spi bus. I was going to build a daughter card but even that deterred me. After a while they came out with the BeagleBone and now you can play around with an idea by wire jamming and a bread board instead of making a significant investment into fabing your own PCB.

I've built 4 revisions of an FPGA development board and more times than not I'm working on it at my desk. So if it's a little larger but easier to use I will be much happier.

Dave

[trioflex]

[dti_eng]

Hi,

As a hardware guy and Parallella owner, I am interested in designing a FMC LPC carrier card for Epiphany. It would expand the LVDS support in PEC-FPGA and add a MGT (multi-gigabit transceiver) to meet VITA 57.1. This would enable a number of third party FMC cards.

Questions:

1.) What is the interest level for a card in the $100 to $200 price point?
2.) How fast a MGT is desired? Is 3 Gbs sufficient?
3.) Any specific functional needs?

Please post suggestions or contact zynq2fmc in care of my good friends at "g" mail.

Thank you for your inputs.

[jlambrecht]

hi, has this ever turned into a real project with availalbe hardware ?

[dti_eng]

Hi,

The trail went cold. I started the hardware design with an inexpensive transceiver from Texas Instruments but learned that it only really supports SATA I and II. It has a bug which causes SATA III initialization to fail sometimes. Asking the user to plug and unplug their HDD several times until it works is probably not viable.

TI has no plans to rev. the part. It would be possible to patch externally but that adds cost and complexity to the design.

What is the interest level at this point? This thread has been very quiet.

[DonQuichotte]

Hi

There are a number of unknown acronyms in here ; for non FPGA guys like me, hard to understand the subject itself.

So ; I guess FMC stands for
FPGA Mezzanine Card, an ANSI standard for mezzanine card form factor, connectors and modular FPGA interfaces.
Thank you wikipedia

Yes, there is a need for high transfers between regular CPU (and its 32 Gb) and Parallella.
Put me Parallella in a PCIe like the Xeon Phi and I'm your man ; or in one of my 8 DDR4 slots

[dti_eng]

Hi,

Which alternative is more interesting - connecting a SATA solid state drive to Parallela or connecting a Parallela to a larger host?

[DonQuichotte]

The latter.
SSD is much slower than the RAM.

Did you consider the Porcupine ? Cannot really figure what you can do with it, soldering is not for me, but it's successful and quite cheap.